Start my hardware project on Xilinx ZYNQ 7000 MPSoC device!
I have got a Z-turn board (designed by Myir Technology) equipped with XC7Z020 SoC chip.
To briefly introduce the ZYNQ devices, we can define it as a combination of FPGA and a dual-core ARM Cortex-A9 processor(also called hard core compared to soft core like MicroBlaze) with on-chip programmable interconnection. The internal connection make the data transfer easier and faster than the previous scheme that place an external ARM processor near a FPGA chip. In the ZYNQ scheme, they call the ARM part Processing System(PS), and the FPGA part Processing Logic(PL). Many convenient implementation of AXI4 bus is provided by Xilinx as IP cores. With the block design function in Vivado, we can quickly integrate our IP cores into the system. Also thanks to the powerful ARM core, we can run Linux operating systems on the PS and directly control all the hardware implementation on the PL.
In Xilinx devices, the clock can be generated by a module called Mixed-Mode Clock Manager(MMCM), which includes a PLL. This module have fractional multiplier and divider thus is quite versatile to meet any need for digital clock generation. Another good thing is that it can be dynamically reconfigured through a set of registers.
The MCMM_DRP is connected to the PS GP0 port through an AXI-interconnection module. I have allocated a small 4KB virtual space for the registers starting at 0x40000000(which is right after my 1GB DDR3 RAM). Because of the limited bandwidth of my Mini-DSO, I have put a 1/4096 clock divider at the output.
In the Linux side, I have two choices to make modifications on registers. The first way is to write a kernel driver that well handles the requests from user space and do the reconfiguration on registers. However, this is not so easy to implement. The another way is to use mmap to map the registers to a virtual address and modify that. This way is easy and can be done in the user space(root privilege is required, though), but not safe. As a simple test and our ‘Hello world!’ project to ZYNQ, I chose the second plan.
Life is short, use python!
There are bunches of frameworks to support a graphical user interface (GUI) on your python application. I choose to use wxPython because I was familiar with that. I embed the graph generated by matplotlib into the GUI to give realtime updating of the data.
This application uses a HighFinesse wavelength meter monitoring a Rubidium locked laser and a commercial He-Ne laser. It can automatically record data into a file and calculate the deviation. A round-robin buffer is used to show short-term and long-term data.
Tapered amplifier, is a device with name resembling its design. It is an laser amplifier(or a gain chip). Its gain area is fabricated to be a tapered shape. The tapered shape help guide the light to a larger output facet, which prevent gain saturation as well as optical damage to the facet.
A drawing of a typical tapered amplifier chip is presented on the left. A drawing of the assembled C-mount tapered amplifier is on the right.
Tapered Amplifier System
When there is no input seed light, a powered tapered amplifier will still emit florescence in both direction. The output florescence (also known as ASM) from the two facet is very different, thus can be used to determine the direction of the chip. Using ASM as a guide light, we can easily align the seed light into the input facet. It is important that you may not use high current as well as high seed power when adjusting seed light coupling. Tapered amplifier will be killed when pumped with high current without proper seeding. Misaligned seed light may also destroy the input facet of tapered amplifier.
When the seed light is partially aligned, you can see laser coming out at the center section of the output ASM. With the help of a laser power meter, I can optimize the amplified laser to maximum. Now, it is safe to turn up the current! I can easily get over 450mW single frequency laser after tapered amplifier.
The tapered amplifier system is shown below.
The seed light comes from a standard ECDL amplified by a injection locking laser.
Since tapered amplifier has a very bad output spatial mode, I have to use several cylindrical lens to shape the beam. In order to prevent retro-reflected laser damaging tapered amplifier(because the reflected laser will be also amplified and collimated to the small input facet which may kill the coating), a good optical isolator is put at the output of the system. Lenses between the tapered amplifier and the isolator are also slightly misaligned to reduce reflection.
AOM Sideband Generation
For experiment needed, I need to generate a sideband(frequency shift a portion of laser) at several hundred MHz. I use an AOM to do that.
Finally, I get around 70mW pure linear polarized output at the output of PM fiber with equal power in the two frequencies. I also set up a scanning FP-cavity beside by system to monitor the system ensuring single frequency output. The yellow channel is the seed light, the green channel is the AOM output. You can clearly see the sideband generated by the AOM 100MHz apart.